In this reference solution, UM3506 PD+ SoC controller chip with RISC-V core is used to realize PD3.1 protocol interaction, bidirectional BUCK-BOOST power chip management, system control, etc.

Adopting flexible and programmable architecture combining software and hardware, UM3506 integrates an internal TCPM/TCPC layered architecture, a native TCPC-like front-end module including digital logic and analog circuits for Type-C interface detection and control, the packet BMC codec in PD PHY layer and key functions with strict timing requirements in PD protocol layer. It is also provided with high-performance 32-bit RISC-V microprocessor core, large-capacity Flash memory, SRAM memory, enhanced peripheral interfaces and rich system resources.

6–7 strings of battery cells

PD3.1 140-W DRP

Full-stack PD DRP protocol

5/9/15/20V@5A, 28V@5A

Supporting SPR PPS, EPR AVS

Flexible VDM message expansion capability

Complete charging and discharging power strategy of the system

Supporting power statistics

Optional system status displays (indicator display, LCD screen display, etc.)

Online upgrade available for UM3506 master

TYPE-C port expansion for TCPM + TCPC architecture